Read only memories including those in which memory elements are field effect transistors (FET) are well known and have extensive application in state of the art digital electronic systems. The ROM is a particularly attractive device for storing fixed program instructions and other information which need not be changed during computer operations. It is a continuing goal of the semiconductor industry to increase ROM density thereby permitting either more compact ROMs or ROMs with larger memory capacity.
Many different approaches for producing high density integrated circuits have been investigated. For example, U.S. Pat. No. 4,208,727 which issued June 17, 1980 to Redwine et al. discusses attempts to increase ROM density by using MOS diodes constructed of programmed N channel field effect transistors. Diode-like cells are produced by shorting the gates to the drains of the FET memory elements. Memory arrays such as the Redwine, et al. array have their density limited by the limits set on the length and width of the ROM array.
It is generally known in the semiconductor industry to provide high density circuits by using what is termed multilayer integrated circuit processing in which, for example, two or three layers of polycrystalline silicon, often referred to as polysilicon, are used to increase circuit density. In U.S. Pat. No. 4,272,880 which issued June 16, 1981 to Pashley, an inverter circuit is fabricated using multilayer integrated circuit processing. Another multilayer arrangement is illustrated in U.S. Pat. No. 4,240,097 which issued Dec. 16, 1980 to Raymond, Jr.